Anders Sandberg gives a good lecture (Google TechTalk) called "Whole Brain Emulation: The Logical Endpoint of Neuroinformatics?" which responds to some of the points raised here. See youtube

Making a brain is what we want to do to solve our resource problems, and help us to focus on the things we care about.

We didn't understand birds - but we didn't duplicate them either. I would draw an analogy between duplicating a specific brain and duplicating specific bird. We learned how to fly a while back - but we still don't know where to begin on the project of making a specific bird.

Even if scanning leads to a working simulation of a brain, there will have to be several more years before sufficiently powerful hardware is available that could run it at "brainspeed".

Keep in mind that there may be more to a mind than neurons (different kinds of cells, hormones etc).

Note how late it happened, and how useless the results are, though. Practically nobody uses IT systems that are scanned and emulated versions of the previous generation of technology.

There is an analogy here: the visual6502 simulator just simulates transistors, with an adequate but imprecise model. It loads a description of a chip - presently the 6502 - and then acts out the behaviour of that chip. Other 6502 models out there were written by understanding how the CPU works - we only had to understand how transistors work. Michael Steil's presentation at 27C3 includes a graph claiming orders of magnitude less work for the same fidelity.

To upload a mind into a computer without having to understand how minds and brains work, one might similarly model at the neuron level and then upload a description of the neuron characteristics and connectivity.

Veering even more off-topic, does anybody know if there's an efficient way to transform this transistor-level design into logic gates? If we could do that, for the entire chip, then we could synthesize an FPGA design that's exactly compatible with the original 6502, which would be pretty neat. Useless, but neat.

I've been trying to think of ways to do this, but none of my ideas sound particularly great. For example, you could probably turn a lot of the chip into logic gates by making the transistor graphs for common logic gates and using some fast subgraph isomorphism algorithm to look for those in the 6502. Of course, this won't do everything, but it would convert at least the PLA portion of the chip. Or you could look for chunks of the transistor graph with a lot of internal transistors for every external connection, and build truth tables for them, which can be converted into logic gates.

Or there's the worse-is-better idea: identify the parts of the chip that can hold state -- registers, latches, whatever -- and then assume that everything else is combinational logic, and build a truly enormous truth table for it. I'm pretty sure this is NP-complete.

Does anybody have ideas for this that don't suck? Because I would love to have a perfect Verilog/VHDL model of the 6502.